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EPM7128S Datasheet (PDF) - Altera Corporation - Programmable Logic Device Family


Description:

The MAX 7000 family of high-density, high-performance PLDs is based on Altera’s second-generation MAX architecture. Fabricated with advanced CMOS technology, the EEPROM-based MAX 7000 family provides 600 to 5,000 usable gates, ISP, pin-to-pin delays as fast as 5 ns, and counter speeds of up to 175.4 MHz. MAX 7000S devices in the -5, -6, -7, and -10 speed grades as well as MAX 7000 and MAX 7000E devices in -5, -6, -7, -10P, and -12P speed grades comply with the PCI Special Interest Group (PCI SIG) PCI Local Bus Specification, Revision 2.2. See Table 3 for available speed grades.


Applications:

Logic array blocks
Macrocells
Expander product terms (shareable and parallel)
Programmable interconnect array
I/O control blocks


Specifications:

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Tag:
EPM7128SQC100-15N EPM7128SQC100-10N EPM7128SQC100-15F