Quick Detail:

Enhanced Configuration Devices

Description:

The Altera enhanced configuration device is a single-device, high-speed, advanced configuration solution for very high-density FPGAs. The core of an enhanced configuration device is divided into two major blocks: a configuration controller and a flash memory. The flash memory is used to store configuration data for systems made up of one or more Altera FPGAs. Unused portions of the flash memory can be used to store processor code or data that can be accessed via the external flash interface after FPGA configuration is complete. Table 1–1 summarizes the features of Altera configuration devices and the amount of configuration space they hold.


Applications:

A configuration interface between the controller and the Altera FPGAs
A JTAG interface on the controller that enables ISP of the flash memory
An external flash interface that the controller shares with an external processor, or FPGA implementing a Nios® embedded processor (interface available after ISP and configuration)


Specifications:

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EP2C8F256C8N EP2C8F256I7N EP2C8F256I8 EP2C8F256C7